Digital receiver for a signal generated with discrete multi-tone modulation

ABSTRACT

A digital receiver for receiving DMT signals includes a time-domain equalizer that includes a digital filter having fixed coefficients.

FIELD OF INVENTION

The invention relates to a digital receiver for a signal produced usingdiscrete multitone modulation.

BACKGROUND

Discrete multitone modulation (DMT), also referred to as multicarriermodulation, is a modulation method which is particularly suitable fortransmitting data via channels in which linear distortion occurs. Incomparison to so-called single-carrier methods such as amplitudemodulation, which has only one carrier frequency, discrete multitonemodulation makes use of a is large number of carrier frequencies. Theamplitude and phase of each individual carrier frequency is modulatedusing quadrature amplitude modulation (QAM). This thus results in alarge number of QAM-modulated signals. A specific number of bits may ineach case be transmitted per carrier frequency. Discrete multitonemodulation is used for digital audio broadcast DAB where it is referredto as OFDM (Orthogonal Frequency Division Multiplex) and fortransmitting data via telephone lines, where it is referred to as ADSL(Asymmetric Digital Subscriber Line).

In ADSL, a DMT-modulated signal is used to transmit data from aswitching center via a subscriber line to a subscriber with an analogconnection. In this case, ETSI and ANSI Standards state that eachcarrier frequency has a bandwidth of approximately 4 kHz, and that atmost up to 15 bits per second per Hz are transported. The actual numberof bits per second per Hz may differ for each carrier frequency, thusallowing the data rate and transmission spectrum to be matched to thetransmission channel.

A DMT transmission system has a coder which combines the bits in aserial digital data signal which is intended to be transmitted, to formblocks. A specific number of bits in a block in each case have anassociated complex number. A complex number is used to represent acarrier frequency f₁=i/T where i=1, 2, . . . , N/2 in the discretemultitone modulation, with all the carrier frequencies f_(i) beingdistributed at equal intervals. T is the time duration of a block.Inverse Fourier transformation is used to transform the carrierfrequencies represented by the complex numbers to the time domain, wherethey directly represent N samples of a DMT signal to be transmitted. Inorder to allow Inverse Fast Fourier Transformation (IFFT) to be used, apower of two is selected for N. This reduces the complexity for InverseFast Fourier Transformation.

After the Inverse Fast Fourier Transformation, a cyclic prefix iscarried out, with the last M (M<N) of the samples being attached onceagain to the start of a block. A periodic signal is thus simulated for areceiver, once the transient process produced by a transmission channelhas decayed after M samples corresponding to a time T·M/N. Theequalization complexity in the receiver can be greatly reduced by meansof the cyclic prefix since, after demodulation in the receiver, all thatis necessary is multiplication by the inverse of the transfer functionof the transmission channel in order to compensate for the lineardistortion in the transmission channel. This requires one complex orfour real multiplications for each carrier frequency.

In ADSL, the physical transmission channel is a two-wire line (twin-corecopper cable) in the telephone network. The two-wire line requires along time for the transient process in comparison to the length of ablock. On the other hand, any additional transmission capacity requiredas a result of the cyclic prefix is intended to be as low as possible.

A cyclic prefix of M=32 is defined in ADSL for a block length of N=512.However, the transient process on the two-wire line has not yet decayedafter M=32 values. Additional errors thus occur in the receiver, whichcannot be compensated for by a frequency-domain equalizer.

Such additional errors can be reduced by using special signal processingmeasures in the receiver.

To this end, a time domain equalizer (TDEQ) is connected upstream of ademodulator. The time domain equalizer is in the form of a digitaltransversal filter, whose coefficients are adjustable. The object of thetime domain equalizer is to shorten the transient process of thetransmission channel. The design of such time-domain equalizers isdescribed in Al-Dhahir, N., Cioffi, J. M., “Optimum Finite-LengthEqualization for Multicarrier Transceivers”, IEEE Trans.on Comm., Vol.44, No. 1, January 1996. However, this has the disadvantage that thedigital transversal filter used as the time-domain equalizer has a largenumber of coefficients, and the adaptation of the digital transversalfilter is complex. A filter length of 20 to 40 coefficients means thatapproximately 50 to 100 million multiplication operations must becarried out per second. In addition, each coefficient must be adjustedfor adaptation of the digital transversal filter.

The technical problem on which the invention is based is thus to specifya digital receiver for a signal produced using discrete multitonemodulation, which receiver has a time-domain equalizer which can beadapted more quickly and which carries out fewer multiplications persecond.

SUMMARY

The invention relates to a digital receiver for a signal produced usingdiscrete multitone modulation. The digital receiver has ananalog/digital converter to which the signal produced using discretemultitone modulation is supplied, and has a time-domain equalizerconnected downstream from the analog/digital converter. The time-domainequalizer in turn has a digital filter with fixed coefficients. Thefixed coefficients of the digital filter as are required for adaptivedigital filters and which require no effort for adaptation areadvantageous in this case.

In one particularly preferred embodiment, the digital filter has integervalues as fixed coefficients. It is particularly advantageous in thiscase that operations with integer values are less complex thanoperations with sliding-point values.

In a further particularly preferred embodiment, the digital filter hasvalues which can be represented by shift operations as fixedcoefficients. This advantageously allows multiplication operations to bereplaced by shift operations, which are less complex.

In one preferred embodiment, the digital filter has a zero at 0 Hz, thusadvantageously shortening the impulse response of the transmissionsystem.

In a further preferred embodiment, the digital filter has a high-passtransfer function.

In one particularly preferred embodiment, the digital filter has aseries circuit comprising a large number of first-order digital filters.The first-order filters can advantageously be produced very easily.

In a further particularly preferred embodiment, each first-order digitalfilter has a state memory, a shift register, a digital subtractioncircuit and a digital addition circuit. The simple construction of eachfirst-order filter is advantageous in this case, with no complexmultiplication stages being required.

Further advantages, features and application options of the inventionwill become evident from the following description of exemplaryembodiments in conjunction with the drawing, in which:

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a transmission path with a digital receiver for a signalproduced using discrete multitone modulation;

FIG. 2 shows an exemplary embodiment of a time-domain equalizeraccording to the invention; and

FIG. 3 shows a diagram illustrating the effect of a time-domainequalizer according to the invention.

DETAILED DESCRIPTION

In the transmission path illustrated in FIG. 1 and having a digitalreceiver 12, a DMT transmitter 11 produces a signal modulated usingdiscrete multitone modulation. The signal in this case has N/2 carrierfrequencies f₁, which are produced by discrete multitone modulation.Each carrier frequency is in this case amplitude-modulated andphase-modulated using quadrature amplitude modulation. In the DMTtransmitter 11, the signal is provided with a cyclic prefix comprising Msamples, and is converted by digital/analog conversion to an analogsignal for transmission. The DMT transmitter 11 transmits the signal viaa transmission channel 1 to the digital receiver 12.

The transmission channel 1 is a channel which produces lineardistortion. In the case of ADSL transmission paths, the transmissionchannel is a two-wire line. Such linear distortion produced by thetransmission channel 1 is compensated for once again in the digitalreceiver 12 by means of equalizers which operate in the frequencydomain.

In the digital receiver 12, the signal is supplied to an analog/digitalconverter 2, which converts it to a sequence of digital values u_(k).

The sequence of digital values u_(k) is supplied to a time-domainequalizer 3. The time-domain equalizer 3 is used to shorten thestabilization time of the DMT transmitter 11, of the transmissionchannel 1 and of the time-domain equalizer 3 itself. If thestabilization time is greater than the cyclic prefix time duration,errors occur in the decision-maker circuits 70 to 7 m in the digitalreceiver 12. The time-domain equalizer 3 is intended to shorten thestabilization time without needing to produce any zeros in the frequencyband which is used for transmission. To this end, the time-domainequalizer 3 has a digital filter with fixed coefficients and having thefollowing transfer function (z=u_(k)): $\begin{matrix}{{H(z)} = {{\prod\limits_{v = 1}^{n}\;{\left( \frac{1 - z^{- 1}}{1 - {c_{v} \cdot z^{- 1}}} \right)\mspace{14mu}{where}\mspace{14mu} c_{v}}} = {\pm \left( {1 - 2^{- L}} \right)}}} & (1)\end{matrix}$

This is the transfer function of a multistage digital filter which hasfixed coefficients c_(v) and is produced by a series circuit comprisingn second first-order digital filters with a transfer function$\begin{matrix}{{H_{v}(z)} = {{\frac{1 - z^{- 1}}{1 - {c_{v} \cdot z^{- 1}}}\mspace{14mu}{where}\mspace{14mu} c_{v}} = {\pm \left( {1 - 2^{- L}} \right)}}} & (2)\end{matrix}$

The transfer function H(z) of the time-domain equalizer 3 has a zero at0 Hz, and is thus the transfer function of a high-pass filter. This isthe most effective way to shorten the stabilization process of thetransmission channel.

The digital values produced by the time-domain equalizer 3 are suppliedto a serial/parallel converter 4 which removes the cyclic preface andproduces blocks which are supplied to a discrete Fast FourierTransformation device 5.

The discrete Fast Fourier Transformation device 5 converts the signalsrepresented by the blocks from the time domain to the frequency domain.Each converted block at the output of the discrete Fast FourierTransformation device 5 has N/2 complex numbers. Each complex numberrepresents a carrier frequency f_(i)=i/T where i=1, 2, . . . , N/2 forthe discrete multitone modulation, with all the carrier frequenciesf_(i) being distributed at equal intervals. T is the time duration of ablock.

The discrete Fast Fourier Transformation device 5 is followed by afrequency-domain equalizer 60, . . . , 6 m for each carrier frequencyf₁, . . . , f_(N/2) and this carries out the equalization process in thefrequency domain. To this end, each complex number in the conversionblock which represents one carrier frequency is multiplied by theinverse transfer function of the transmission channel 1. This requiresone complex multiplication operation, or four real multiplicationoperations.

Each frequency-domain equalizer 60, . . . , 6 m is followed by arespective decision-making circuit 70, . . . , 7 m, which produces amultistage value from the output signal from the frequency-domainequalizer 60, . . . , 6 m.

Each decision-making circuit 70, . . . , 7 m is in each case followed bya decoder circuit 80, . . . , 8 m, which produces a digital value fromthe multistage value.

The output signals from the decoder circuits 80, . . . , 8 m aresupplied in parallel to a parallel/serial converter 9, which isconnected to a data sink 10. The parallel/serial converter 9 suppliesthe data sink 10 with a serial stream of digital data, corresponding tothe digital data from the DMT transmitter 11.

FIG. 2 shows an exemplary embodiment of a time-domain equalizeraccording to the invention.

The time-domain equalizer has a series circuit comprising n secondfirst-order digital filters with a transmission function as in Equation(2). FIG. 2 shows only two first-order digital filters 100 and 200.Further second first-order digital filters are indicated by dots.

All the second first-order digital filters 100 and 200 are constructedin the same way. A discrete input value sequence is supplied to a firstinverting input of a digital subtraction circuit 101 or 201,respectively, and, in parallel, to a first non-inverting input of adigital addition circuit 103 or 203, respectively. One output of thedigital addition circuit 103 or 203, respectively, is an output of thesecond first-order digital filter and is fed back in parallel form to anon-inverting input of the digital subtraction circuit and, via a shiftregister, to a second inverting input of the digital subtraction circuit101 or 201, respectively. The shift register 104 or 204, respectively,multiplies a discrete output value by shifting to the right, bit-by-bit.In consequence, the discrete output value is multiplied by an integernumber 2^(−L). One output of the digital subtraction circuit 101 or 201,respectively, is passed via a state memory 102 or 202, respectively, toa second non-inverting input of the digital addition circuit 103 or 203,respectively. The state memory 102 or 202, respectively, produces adelay by one clock period of the clock which is used to clock thediscrete input sequence.

If L=0 is chosen, the second digital filters 100 and 200 arenon-recursive. In this case, in accordance with Equation (2), thecoefficients c_(v) become zero.

In one exemplary embodiment which is not illustrated, the second digitalfilters differ in the integer number 2^(−L) _(v) which is used tomultiply a discrete output value from a second digital filter in thefeedback path. In this exemplary embodiment, the coefficients c_(v) inaccordance with Equation (1) differ for every alternate digital filter,and that digital filter which results from the series connection of thesecond digital filters has a transfer function in accordance withEquation (1).

FIG. 3 uses two diagrams to illustrate the effect of six differentexemplary embodiments of time-domain equalizers according to theinvention. To this end, the signal-to-noise ratio and the input of thedecision-making circuit was simulated on an ADSL transmission systemhaving a two-wire line with a length of 3 km and a diameter of 0.4 mm.

Only the influences from the time-domain equalizer were considered. Thesignal-to-noise ratio is plotted over the entire frequency band used forADSL transmission. A respective curve profile is indicated for each ofthe six different time-domain equalizers, whose respective transferfunctions are H₁(z) to H₆(z) The transfer functions H₁(z) to H₆(z) areas follows:H ₁(z)=1−z ⁻¹H ₂(z)=(1−z ⁻¹)²

H ₃(z)=(1−z ⁻¹)³${H_{4}(z)} = \left( \frac{1 - z^{- 1}}{1 - {0.5 \cdot z^{- 1}}} \right)$${H_{5}(z)} = \left( \frac{1 - z^{- 1}}{1 - {0.5 \cdot z^{- 1}}} \right)^{2}$${H_{6}(z)} = \left( \frac{1 - z^{- 1}}{1 - {0.5 \cdot z^{- 1}}} \right)^{3}$

A curve profile without a time-domain equalizer and a curve profilehaving an optimized time-domain equalizer with 32 coefficients (32 taps)are shown for comparison. Both diagrams clearly show the improvement inthe signal-to-noise ratio in the region of the lower frequencies. In thecase of time-domain equalizers having a second, third or higher orderdigital filter, the signal-to-noise ratio differs from that of theoptimized time-domain equalizer with 32 coefficients only by a fewdecibels above a frequency of about 300 kHz.

1. A digital receiver for receiving an input signal produced usingdiscrete multitone modulation, said receiver comprising: ananalog/digital converter to which the input signal is supplied, and atime-domain equalizer connected downstream from the analog/digitalconverter, the time-domain equalizer including a digital filter havingfixed coefficients, wherein the fixed coefficients of the digital filterhave values that can be represented by shift operations.
 2. The digitalreceiver as claimed in claim 1, wherein the fixed coefficients of thedigital filter have integer values.
 3. The digital receiver as claimedin claim 1, wherein the digital filter has a zero at 0 Hz.
 4. Thedigital receiver as claimed in claim 1, wherein the digital filter is ahigh-pass filter.
 5. The digital receiver as claimed in claim 1, whereinthe digital filter comprises a series of circuits, each of the circuitshaving a plurality of first-order digital filters.
 6. The digitalreceiver as claimed in claim 5, wherein each first-order digital filtercomprises: a state memory, a shift register, a subtraction circuit, andan addition circuit.